Layout Engineer

Location: Hanoi, Vietnam


Job ID:

Minimum Education:

Duration:

20172-VN

Bachelor's Degree

Regular

Type:

Minimum Experience:

Hours:

Experienced Professional

0 years

Full-Time


Purposes:

Fast-growing Analog Semiconductor pre-IPO Company focusing on Motor Control and Analog Power is looking for a highly motivated, hands-on, and experienced Layout Engineer in Vietnam design office.

All experience and fresh graduate candidates or final year students are welcome to apply

Work as a team with other layout engineers and designers, local and/or globally to complete full chip projects.

Work with a multi-discipline and international team of design engineers on innovative standard cell and pixel layout in the most advanced CIS process technologies.

Responsibilities include all aspects of IC mask design from creating block layout to full chip floor plans, planning schedules, hookup, and verification to tape-out.

Primary Responsibilities:

  • Block to chip level floor plan and layout
  • Block and top level verification through tape out

Qualifications & Requirements:

  • Bachelor's Degree in Electrical, Electronic and Telecommunication or related field.
  • Good written and verbal communication skills, good at reading and writing in English and presentation is advantage.
  • Eager and quick to learn.
  • Ability to work well in a team environment.
  • Being able to understand array layout specificity and experience in analog IC layout.
  • Understanding the physical reason being Design Rule Checks, Layout versus Schematics verification and other physical and electrical design rules will be essential.
  • Good problem solving and de-bugging skills.
  • Good understanding of analog/Mixed signal CMOS circuit design concepts.
  • Cadence tools (Virtuoso, LVS/DRC/QRC verification…), Unix.




Send your Resume & Cover Letter to careers@active-semi.com